The present disclosure relates to memory devices that store data based on resistance value, and more specifically, to multiple resistive memory components sharing a single access transistor. As memory density increases, need for new memory technology other than dynamic random access memory (DRAM) is increasing, as DRAM technology scaling is facing a wall due to various problems including retention time. There are emerging memory devices that store data as resistance values. For example, phase change memory (PCM), magnetic random access memory (MRAM), spin-torque-transfer magnetic random access memory (STT_MRAM), and resistive random access memory (ReRAM) all use variation of resistance. These memory cells can be composed of one access transistor and one resistive memory component. For these data storage devices, the access transistor may also limit the scaling of the geometry and could be a bottleneck to achieve higher memory density.